1. Technical Field
The present invention relates to semiconductor devices and methods for manufacturing semiconductor devices, and is particularly suitable to be applied to the laminated structure of field effect transistors of different conductivity types.
2. Description of Related Art
In a conventional CMOS (Complementary Metal Oxide Semiconductor) circuit, a P-channel field effect transistor and an N-channel field effect transistor are laid out adjacent to each other in the same two-dimensional plane.
Also, for example, Patent Japanese Laid-open Patent Application HEI 10-261799 (JP '799) describes a method in which, for forming a silicon thin film excellent in crystallinity and uniformity on a dielectric film of a large area, an amorphous or polycrystal silicon layer formed on a dielectric film is irradiated with a pulse-like ultraviolet beam, thereby forming a polycrystal silicon film composed of single crystal grains each in a generally square shape arranged in a chessboard pattern on the dielectric film, and the surface of the polycrystal silicon film is planarized by CMP (chemical mechanical polishing).
However, when a P-channel field effect transistor and an N-channel field effect transistor are disposed on the same two-dimensional plane, an area required for forming a CMOS circuit increases, which becomes a problem that obstructs higher density integration. Also, the wiring length necessary for connecting the P-channel field effect transistor and the N-channel field effect transistor becomes greater, which becomes a problem that increases propagation delay.
Also, when field effect transistors formed in silicon thin films are to be laminated, a field effect transistor exists in a lower layer. As a result, the flatness of a base dielectric film where a silicon thin film in an upper layer is formed deteriorates, and heat treatment conditions at the time of forming the silicon thin film in the upper layer are restricted, which causes a problem in that the crystallinity of the silicon thin film in the upper layer becomes inferior compared to the crystallinity of the silicon thin film in the lower layer.
Therefore, it is an object of at least one embodiment of the present invention to provide semiconductor devices and methods for manufacturing semiconductor devices, which can suppress deterioration of the crystallinity of semiconductor layers where field effect transistors are formed, and allow lamination of field effect transistors of different conductivity types.